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Week |
Monday |
Wednesday |
Friday |
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1 |
March |
Introduction (I) |
March |
Boolean Algebra (II) |
April |
Realizing Boolean Logic
(III) |
|
April |
Canonical Forms (IV) |
April |
Logic Minimization (V)
|
April |
Logic Minimization (V)
(cont) |
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April |
Logic Logic
Minimization (VI) |
April |
Logic Time Behavior (VII) |
April |
Mux and Decoder Logic (VIII) |
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|
April |
Programmable Logic (IX) |
April |
Adders (X) |
April |
Adders (X) (cont) |
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|
April |
Comb. Logic Examples (XI) |
April |
Sequential Logic (XII) |
April |
Sequential Logic (XII)
(cont) |
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|
May |
Sequential Logic (XII)
(cont) |
May |
Registers, Counters, Memories
(Registers.pdf) |
May |
Processor Intro (Registers.pdf) |
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|
May |
Sequential Verilog (XIII) |
May |
Finite State Machines Part I (XIV) |
May |
FSMs Part I, Verilog
for FSMs |
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|
May |
Sequential Verilog Examples |
May |
|
May |
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|
May |
Project Specification (XVI) |
May |
Design Example: Run-Length Encoder |
May |
Design Example (cont): Run-Length Decoder |
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|
10 |
May |
Memorial Day |
June |
FIFOs and Asynchronous Inputs |
June |
Final Exam Review and
Evaluations |
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June |
Final Exam |
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