The remaining homework assignments will focus on implementing the x370 Processor. You already understand the operation of the x370 Model 0, which executes ALU instructions using the registers in the register file. You will now implement the remaining instructions, a few at a time, until you have the complete processor designed. We will give you simple test programs to use to make sure your design works correctly, but you should write programs of your own to help you debug your circuit.
1. (Due Wednesday, May 26, start of class) Design the x370 Model 2. This involves adding the Load Immediate and the Branch instructions to the x370 Model 0. The Load Immediate instruction uses data that is contained in the instruction, instead of data from the ALU, to write into the register file. This allows programs to load registers with specific values. Don’t forget: the immediate value is a signed value and so you need to sign-extend this when storing to the register file. Implementing the Branch instructions will mean changing the PC (program counter) so that it can load a new address value, which is provided by the instruction itself, instead of just counting.
Here is a project that you can use as a starting point. Note that we are using a control module that takes the instruction and generates all the control signals (and more) that are need to operate the datapath. This control module is actually quite simple – I would strongly advise you to stick with assign statements.
I would encourage incremental design. Add the LDI instruction first and make sure it works, before adding the branch instructions. There are two test programs for this part which test the new instructions: iram1.dat tests the load instruction and iram2.dat tests the branch instructions. You can find the expected values of the registers after executing these two programs in the comments.
Once your computer is working, translate the following C/Java program into instructions for the x370.
//
N and M are arbitrary numbers loaded using the load immediate instruction
mult = 0;
// Use register 0 for mult
for
(int i = 0; i < N; i++)
mult += M;
Turn in a printout of your top-level schematic and the Verilog for the control and PC modules, a printout of your multiply program (with comments!) plus a screen shot showing the contents of your register file at the end of the simulation. You must also submit a final copy of your project electronically – details will be posted later.
2. (Due Friday, June 4, start of class) Design the x370 Model 3. This involves adding the data memory to your processor and implementing the load and store instructions. You will find the dram module in the lib370 library to use for the data memory. The dram module is a single-ported memory, which means that it has only one address port and one data port for both reading memory and writing memory. The write control signal determines whether a value on the Data port is being written. If write = 1, then the data to be written to the memory is driven onto this port from the outside (by your circuit). This data is written to the memory location indicated by the value on the Address port. If write = 0, then you must tri-state the Data bus, and the memory will drive the value at the specified location onto the bus. That is, the memory will tri-state its output when you are writing to the memory, and you must tri-state your output to the bus when the memory is reading a value onto it. The TBUF module in lib370 is a tri-state driver that you can use in your schematics.
The test program for x370 Model 3 is linked here search.x370 and search.dat (These are new 5/28). Use the data file data_250.dat for the dram module. (Specify the data file to use by changing the parameter for the dram module, just like you do for the iram module.)
// The program needs to run
about 300 cycles with the
// data_250.dat data file.
//
// The final register values
should be:
// R0: 0057
// R1: 07D9
// R2: 0EF9
// R3: 0000
Once you your program is working, compile the following program into instructions for your processor. This program decrypts a message stored in the data memory and prints it to the console.
key = dram[0];
for (i=10; dram[i]!=0; i++) {
dram[255] = dram[i]
XOR key;
key = (key XOR (key<<3)) + 5;
}
The decryption key is stored at address 0, and the string to be decoded is stored one character per location starting at address 1. A value of 0 marks the end of the string. Note that whenever a value is stored at address 255, it is printed as a character to the console. This is an example of memory-mapped I/O.
For this decryption program, you will need a new version of the dram, called dram3.v. Use the data file encrypted.dat for the dram module (NEW 6/1).
New Instructions:
Turn in an Active-HDL archive of your project design to this dropbox. Include the console log file that shows what
the simulation prints to the console for your program. Make sure to include all
files as I will restore your design and run it with a new encrypted.dat
file. It is your responsibility to make
sure what you turn in works. Make sure you include your program .dat file!!
[Extra Credit] Add a new instruction to the processor for executing function calls. Document your design decisions. Write a program that uses function calls. If you are very ambitious, you will allow nested, even recursive, function calls!