Course Schedule (
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DATE
TOPIC
QUIZ
LABS
Week 1
Tue, Jan 06
LEC 01
Combinational Logic
Slides:
pdf
Reading:
B&V: § 1.0-1.4, 2.0-2.7
Wed, Jan 07
DEMO 01
Lab Kit Pickup
Fri, Jan 09
SEC 01
Software Installation and Workflow
Pre-Survey Due
Week 2
Tue, Jan 13
LEC 02
Verilog Basics
Reading:
B&V: § 2.9-2.10
Wed, Jan 14
DEMO 02
Extra Office Hours
Fri, Jan 16
SEC 02
Combinational Logic and Modules
Week 3
Tue, Jan 20
LEC 03
Karnaugh Maps
Reading:
B&V: § 2.11-2.12, 2.14
Wed, Jan 21
DEMO 03
Lab 1&2 Demos
Lab 1&2 Due
Fri, Jan 23
SEC 03
Test Benches
Week 4
Tue, Jan 27
LEC 04
Sequential Logic
Reading:
B&V: § 5.0-5.4.4
Wed, Jan 28
DEMO 04
Lab 3 Demos
Lab 3 Due
Fri, Jan 30
SEC 04
Sequential Logic
Week 5
Tue, Feb 03
LEC 05
Finite State Machines (FSMs)
Reading:
B&V: § 6.0-6.4
Quiz 1 Due
Wed, Feb 04
DEMO 05
Lab 4 Demos
Lab 4 Due
Fri, Feb 06
SEC 05
Finite State Machines
Week 6
Tue, Feb 10
LEC 06
FSM Design, Multiplexors, Adders
Reading:
B&V: § 3.0-3.3.3, 3.3.5
Wed, Feb 11
DEMO 06
Lab 5 Demos
Lab 5 Due
Fri, Feb 13
SEC 06
User Input and Top-Level Modules
Week 7
Tue, Feb 17
LEC 07
Encoders, Decoders, Registers, Counters
Reading:
B&V: § 4.0-4.1.1, 4.2-4.3
Wed, Feb 18
DEMO 07
Lab 6 Demos
Lab 6 Due
Fri, Feb 20
SEC 07
Common Issues When Connecting Modules
Week 8
Tue, Feb 24
LEC 08
Project Tips
Reading:
B&V: § 5.8-5.9
Quiz 2 Due
Wed, Feb 25
DEMO 08
Lab 7 Demos
Lab 7 Due
Fri, Feb 27
SEC 08
Problem Decomposition
Week 9
Tue, Mar 03
LEC 09
Computer Components, FPGAs
Reading:
B&V: § B.6
Wed, Mar 04
DEMO 09
Lab 8 Check-ins
Lab 8 Check-In Due
Week 10
Tue, Mar 10
LEC 10
No Lecture - Quiz 3
Quiz 3 Due
Wed, Mar 11
DEMO 10
Lab 8 Demos
Fri, Mar 13
Lab 8 Due
Week 11