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University of Washington Department of Computer Science  Engineering 

CSE 591n: Configurable Computing Seminar
Autumn, 2006
Overview of coarse grained configurable architectures

Monday 3:30-4:20 Allen 303


Oct. 2 – Overview and discussion of RaPiD -

Oct. 9 – Applications - Presented by Scott Hauck

Oct. 16 – PACT - Presented by Benjamin -

Oct. 23 – Virtex-5 Overview - Presented by Ken Eguro - Please look over the following datasheets to familiarize yourself with the basic architectures.
    Virtex-5 Datasheet
    Virtex-4 Datasheet

Oct. 30 – Affiliates - no meeting

Nov. 6 – Morphosys - Presented by Mike Haselman -
    MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications

Nov. 13 – ADRES / Stretch - Presented by Allan Carroll -
    S5: The Architecture and Development Flow of a Software Configurable Processor
    ADRES: An Architecture with Tightly Couple VLIW Processor and Coarse-Grained Reconfigurable Matrix

Nov. 20 – PipeRench - Presented by Brian Van Essen -
    PipeRench: A Reconfigurable Architecture and Compiler

Nov. 27 – Maspar / Slap - Presented by Jacob Nelson -
    The MasPar MP-1 Architecture
    The Design of the MasPar MP-1: A Cost Effective Massively Parallel Computer

Dec. 4 – Review

Dec. ?? – HSRA / Quicksilver - Presented by Karl Meier

Dec. ?? – Paddi - Presented by Nathaniel

Portions of the CSE 591n Web may be reprinted or adapted for academic nonprofit purposes, providing the source is accurately quoted and duly credited. The CSE 591n Web: 1993-2006, Department of Computer Science and Engineering, University of Washington.


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