Lecture 1 Logic Design Review

Lecture 2 Digital System Design Process

Lecture 3 Verilog Overview

Lecture 4: Logic Synthesis for FPGA

Lecture 5: System Synthesis and Embedded Systems

                  see also Lecture Notes on Embedded Processors, Specifically about the StrongArm 1100 by Gaetano Borriello

Lecture 6: Embedded Processors and Software, and the Hydra webserver