HDLs

• ISP (circa 1977) - research project at CMU

  • simulation, but no synthesis

• Abel (circa 1983) - developed by Data-I/O

  • targeted to programmable logic devices
  • not good for much more than state machines

• Verilog (circa 1985) - developed by Gateway (now part of Cadence)

  • similar to Pascal and C
  • delays is only interaction with simulator
  • fairly efficient and easy to write
  • IEEE standard

• VHDL (circa 1987) - DoD sponsored standard

  • similar to Ada (emphasis on re-use and maintainability)
  • simulation semantics visible
  • very general but verbose
  • IEEE standard

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