CSE 378 Winter 2006
Course Schedule

Under construction!

This calendar represents my intentions. Reality trumps intention, should the two disagree.

Key:

  • Exam
  • Holiday
  • Homework
  • Lecture
  • Section
  • Week of Monday Wednesday Thursday Friday
    January 2
    Introduction
    Slides
    Text:Chapter 1
    CSE 370 Review
    The MIPS R2000 ISA:
    Basics of the ISA: registers, memory, immediates, simple instructions, encoding
    Sections 2.1-2.4
    Realize A.10 exists

    Handout

    January 9 The MIPS R2000 ISA:
    Logicals, Branching, Data representation
    Section 2.5-2.6
    Handout
    Example code

    Memory Layout, Assembling, Linking
    Sections 2.8-2.9, (2.10-21.13)
    (Appendix A.1-A.5, Figure A.6.1)

    Handout

    TBA
    Assembling/Compiling with Cebollita
    Examples from class

    January 16 MLK Day
    Assembling/Compiling with Cebollita
    Examples from class
    Handout

    TBA
    Procedure calls
    Chapters 2.7, A.6
    Lecture notes

    January 23 Procedure calls
    Chapters 2.7, A.6
    Lecture notes

    Midterm I
    Handout
    Answer key
    Exam scores

    TBA
    Performance
    Chapter 4

    January 30 Intro to Datapaths
    Intro to SMOK
    Chapters 5.1-5.3

    Single-cycle implementation:
    datapath
    control
    Chapter 5.4
    Chapters 5.4, Appendix C.2
    Stack machine example

    TBA
    The OS: Exceptions and Simple Address Translation
    Chapters 5.6, Appendix A.7

    February 6 Exceptions / Address Translation / IO Controllers (cont.)
    Chapters 5.6, Appendix A.7
    Exceptions, Protection, and the OS
    Handout

    Exceptions / Address Translation / IO Controllers (cont. II)
    Exceptions, Protection, and the OS
    Chapters 5.6, Appendix A.7

    TBA
    Multi-cycle
        Chapters 5.5
    Pipelining: Introduction
        Chapter 6.1

    February 13 Pipelining: Data path
    Chapters 6.2, 6.3

    Pipelining: Data Hazards
    Chapters 6.4, 6.5

    TBA
    Pipelining: Control Hazards
    Chapter 6.6

    February 20 Presidents Day
    Pipelining: Control Hazards
    Branch Prediction
    Exceptions
    Chapter 6.6

    Mid-term review
    Midterm II Out
    Takehome exam, due 9:45 Monday, 2/27
    Answer key
    Exam scores
    Lecture component: Branch Prediction/Exceptions

    February 27 Caches I
    Chapters 7.1, 7.2
    Midterm II due 9:45am

    Caches II
    Chapters 7.2, 7.3

    TBA
    Virtual memory I
    Chapters 7.4

    March 6 Virtual memory II
    Chapters 7.4

    (Micro)Architectures: Early 1990's
    Mips R4000, PowerPC (601), Pentium

    TBA
    (Micro)Architectures: Early 2000's
    PowerPC G5, Pentium 4

    March 13 Review Sessions

    Monday
    7:00PM
    CSE 203
    Lucas

    Tuesday
    11:30AM
    CSE 218
    Jimmy

    Final Exam
    8:30-10:20