CSEP 548 Autumn 2012
Retro prof in the lab University of Washington Computer Science & Engineering
 CSEP 548 Autumn 2012
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Note: this schedule is subject to change. Please check back frequently.

Submit all reading and homework assignments electronically via the Catalyst dropbox.

Unless otherwise noted, assignments are due at the end of the date specified (that is, ~11:59pm). Note: Catalyst only allows 15-minute increments, so the dropbox may complain if you submit at 11:59pm, but we will not mark it late.

Critiques:A paragraph summarizing the core points of the paper and what you learned (what surprised you).

Lecture Date Topics Textbook Reading Paper Assignment Slides Homework
1 Sept 26 Introduction and Metrics 1.1 — 1.9
optional: 1.10 — 1.12
overview (annotated),
intro (annotated),
metrics (annotated)
  • Critique 1: Moore's Law. Due: Oct 5
  • Homework 1 (problem set) Due: Oct 9
- Oct 3 No Class
2 Oct 10 Instruction Set Architectures Appendix A Colwell et al. - Instruction Sets and Beyond

Optional: Wulf - Compilers and Computer Architecture
ISA(annotated)
  • Homework 2 Due: Wed. Oct 17, 6:30pm
  • Critique 2: Colwell essay. Due: Wed. Oct 17, 6:30pm
3 Oct 17 Pipelining Review and Branch Prediction 3.3
Skim: Appendix C
Evers et al. - An Analysis of Correlation and Predictability Pipelining (annotated), Branch Prediction (annotated),
  • Critique 3: Evers branch prediction paper. Due: Oct 24, 6:30pm
  • Homework 3: Mystery Branch Predictor Due: Oct 28, 11:59pm
4 Oct 24 ILP part 2 Chapter 3 Superscalar (annotated) Scheduling (annotated) Homework 4: ILP Scheduler Due: Nov 4, 11:59pm
5 Oct 31 ILP part 3:
  • Simultaneous Multithreading
  • Data level parallelism
Chapter 4 Critique 4: Tullsen SMT paper. Due: Nov 7, 6:30pm
6 Nov 7 Memory Hierarchy Chapter 2
Skim: Appendix B
Jouppi - Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers Homework 5: Mystery Cache Due: Nov 18, 11:59pm
7 Nov 14 Multiprocessors Chapter 5 Lamport - How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs

Optional:
- Nov 21 No Class - Thanksgiving Week
8 Nov 28 Multiprocessors part 2 Gharachorloo et al. - Two Techniques to Enhance the Performance of Memory Consistency Models Consistency & Synchronization (annotated) Homework 7: Concurrency Problem Set. Due: Dec 9, 11:59pm
9 Dec 5 Virtualization, binary translation, warehouse-scale computing, ...


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