MIPS R4000 pipelines
R4000
- 8 stage integer pipe (superpipelined, some longer stages such as memory access now take more than one stage).
- Load delay 2 cycles
- Branch delay : 1 delay slot + 2 cycles
- 8 stage f-p pipe. Stages can be used in any order, multiple times
- Thus potential conflicts between independent instructions (structural hazards)
- For details see book