| Oct 11th | Martha |
Optimizing Replication, Communication, and Capacity Allocation in CMPs Zeshan Chishti, Michael D. Powell and T. N. Vijaykumar |
| Oct 18th | Andrew Pu. |
Energy Optimization of Subthreshold-Voltage Sensor Network Processors Leyla Nazhandali, Bo Zhai, Ryan Helfand, Michael Minuth, Javin Olson, Sanjay Pant, Anna Reeves, Todd Austin, David Blaauw |
| Oct 25th | Steve S. |
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling Rakesh Kumar, Victor Zyuban, and Dean M. Tullsen |
Nov 1st | Ben |
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors Evan Speight, Hazim Shafi, Lixin Zhang,Ram Rajamony |
| Nov 8th | Brian |
Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation by Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas |
| Nov 15th | Scott & Lucas |
The Impact of Performance Asymmetry in Emerging Multicore Architectures Saisanthosh Balakrishnan, Ravi Rajwar, Mike Upton, Konrad Lai |
| Nov 22nd | Steve B. |
Techniques for Efficient Processing in Runahead Execution Engines Onur Mutlu, Hyesoon Kim, and Yale N. Patt |
| Nov 29th | Andrew Pe. |
A High Throughput String Matching Architecture for Intrusion Detection and Prevention Lin Tan, Timothy Sherwood |
| Dec 6th | Andy |
Virtualizing Transactional Memory Ravi Rajwar, Maurice Herlihy and Konrad Lai |