Spring, 2001

Tuesdays, 12:30, EE1 042

Professor Susan Eggers & Patrick Crowley

In this quarter's architecture seminar, we will survey the literature on application specific processing.

In particular, we will consider microprocessor architectures specifically tailored for: network communication, media processing, database workloads, and cryptography. (We might also read an FPGA/reconfigurable paper if we can find a good one.) We will wrap up this component of the seminar with a group discussion on open problems and opportunities for further research in this area.

The papers for this quarter are organized below according to the four categories mentioned above. Each week, the class will most likely only need to read one paper; the presenter and other interested parties can look to the other papers/resources listed in each category for background material. If there's interest, of course, we could have two people present a different but related paper each week.

Network Communication

Network Processors 1

On the Performance of Multithreaded Architectures for Network Processors
Crowley, Fiuczynski and Baer (UW TR)

For background info, see: Characterizing Processor Architectures for Programmable Network Interfaces
Crowley, Fiuczynski, Baer, Bershad (ICS 2000)

Network Processors 2

Cache Memory Design for Network Processors
Chiueh & Pradhan (IEEE Micro, 2000)

Media Processing

Media Processing 1

We will take another look at the Imagine project from Stanford. The presentation of this material should include a quick overview of the project, in addition to the new contributions in the latest paper that we'll all be reading.

Efficient Conditional Operations for Data-parallel Architectures
Kapasi, Dally, et al. (MICRO-33)
Imagine overview presentation from HotChips
Imagine overview paper from MICRO-31

Media Processing 2

The MAP-CA is Equator's second generation vliw-based media processor. (Rumor has it that we have a bit of departmental knowledge about what happens at Equator.)

MAP-CA VLIW-based Media Processor
Basoglu, Zhao, Kojima, Kawaguchi


Piranha is a chip-multiprocessor from Compaq WRL that's intended for use in high-performance database servers.

Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing
Barroso et al. (ISCA 2000)
WRL Database Research Group web site:


Crypto 1

We'll look at Todd Austin's ISCA 2001 paper on the Cryptomaniac project.

CryptoManiac: A Fast Flexible Architecture for Secure Communication
Wu, Weaver, Austin (ISCA 2001)

Crypto 2

There's been quite a bit of work done on FPGA-based crypto implementations. We'll take a look at this paper (from Scott Hauck) to see how it compares to Austin's approach.

A Bit-Serial Implementation of the International Data Encryption Algorithm IDEA
Leong, et al. (FCCM 2000)

Miscellaneous Papers

Based on the schedule as it stands now, we'll have one empty slot at the end of the quarter in which to discuss one of the recently published papers listed below. If you're interested in presenting one of these on the last day of class, send me some mail (pcrowley@cs).

Sign up to present a paper in class.

We are using a web-based signup tool to pick papers to present in class. If you have problems, please send email to rose@cs.washington.edu and let him know specific details about the problem.

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