CSE 548 — Computer Systems Architecture

Welcome to Computer Architecture, taught by Prof. Michael Taylor with Luis Vega.

Course Overview

Lectures: Wednesday/Friday 10am-11:20am (EEB 025)
Prof Office Hours: Wednesday, after class (11:30a)
TA Office Hours: Monday 2:30pm-3:30pm (CSE 615) - week 04/09-04/13 (04/10 2:00pm-3:00pm in CSE 615)
Textbook: Computer Architecture, Sixth Edition: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design), by John L. Hennessy and David A. Patterson.
Canvas course link
Canvas paper discussions link
SystemVerilog coding guidelines link
Homework (code) link

Schedule

Many weeks there are assigned readings. You should read all of the papers that are assigned very carefully.

As to the textbook, it is a great outline of the many topics in computer architecture. But it is really freaking long.

I would read it so that you understand the terms and key insights, and for project ideas. No need to remember any machine-specific details (i.e., size of Core i7-6900K cache) or numbers (gcc is 2X faster with a 32KB L1 cache).

I would read it quickly, and quickly jot down the following:

key insights
key terms
mechanisms (usually some gadget or optimization that makes something go faster)

Then after you read the section, quiz yourself on those items, and you are done.

I would skip the "Pitfalls and Falacies" and skip/skim "Concluding Remarks" or "Historical Perspective". =)

Schedule subject to change and evolving over time!

Date	Topic & Readings	HW
March 28 (W)	Intro Class Overview About the instructor Intro	Start thinking about a project Form a group HW 0 out
March 30 (F)	Technology, ISA Chapter 1 of Hennessey and Patterson (HP) Review Appendix A of HP (ISA) Technology	HW 0 Due HW 1A Out Class survey
April 4 (W)	Technology / Metrics Review Appendix C of HP Chapter 3.1-3.3 of HP Chapter 3.9 (p228-334 only)	Pre-HW 2 Out
April 6 (F)	Metrics
April 11 (W)	Memory Hierarchy / Virtual Memory Review Appendix B of HP (Memory Hierarchy) Chapter 2 of HP (Mo' Memory)
April 13 (F)	Cache Coherence / Memory Consistency Chapter 5 of HP (Thread-level parallelism) Branch Prediction	HW 1A Due HW 1B Out
April 18 (W)	Dynamic Scheduling - Chapter 3.4-3.7 of HP Complex Pipelining
April 20 (F)	FPGAs in the Cloud (TBA, Microsoft) FPGAs in the Cloud
April 25 (W)	GPU Architecture and Trends (Brad Beckman, AMD) AMD GCN Architecture AMD Vega Architecture paper slides	HW 1B Due HW 2 Out
April 27 (F)	Computer architecture, A balancing act (Bobbie Manne, Cavium) slides	Project Proposal Due
May 2 (W)	Dynamic Scheduling / Multithreading Chapter 3.8-3.13 of HP
May 4 (F)	SmartNICs in the Public Cloud (Andrew Putnam, Microsoft Research) Azure Accelerated Networking: SmartNICs in the Public Cloud	HW 2 Due
May 9 (W)	3D integration (Gabriel Loh, AMD Fellow) TBD.
May 11 (F)	Compilers Plus Arch (Aaron Smith, Microsoft) TBD.
May 16 (W)	ADA Annual Review TBD.
May 18 (F)	Out-of-order, MIPS R10K Alpha 21264 Wavescalar
May 23 (W)	Domain Specific Architectures (Neural Networks!) Chapter 7 of HP (Domain Specific Architectures)
May 25 (F)	Catchup
May 30 (W)	CMOS Scaling / Dark Silicon / Hardware Specialization Is Dark Silicon Useful? Harnessing the Four Horsemen of the Coming Dark Silicon Apocalypse Conservation Cores, Reducing the Energy of Mature Computations
Jun 1 (F)	Warehouse-scale Computing, FPGA Clouds, ASIC Clouds Specializing a Planet Computation Asic Clouds In-Datacenter Performance Analysis of a Tensor Processing Unit TVM: End-to-End Optimization Stack for Deep Learning	Project Due
Jun 4 (M)	Project presentation (in-class) time 8:30am - 10:20am

Computer Systems Architecture Spring 2018 548

Course Overview

Schedule

Computer Systems Architecture Spring 2018
548