DRAM notes (con’t)
Most DRAMs have built-in refresh counters
- Counter cycles through rows
- Every 15.6µs for modern DRAM (4096 rows)
- You supply \CAS pulse (or \CAS-before-\RAS)
- Internal logic reads and rewrites a row
Most DRAMs allow fast page-mode reads/writes
- Use when reading multiple words from same row
- Supply RAS once but CAS many times
New DRAMs are synchronous (SDRAM)
- Read/write on a clock edge
- Pipelining to internal memory banks