Modules

module add4 (A, B, SUM, OVER) ;

input [3:0] A ;

input [3:0] B ;

output [3:0] SUM ;

output OVER ;

assign {OVER, SUM[3:0]} = A[3:0] + B[3:0];

endmodule

• The basic building block

  • Instance into a design
  • Illegal to nest module defs
  • Example: 4-bit adder

Previous slide

Next slide

Back to first slide

View graphic version