The primary way that the Microblaze communicates with and controls peripheral hardware devices is through memory mapped I/O. This can be thought of as having some memory that is manipulated by the Microblaze and then simply read by the hardware. But often, the hardware does not need as much space as it is allocated in the global address space. When this happens, building a memory that is the entire size of the allocated space would be wasteful. This is why devices will often explicitly decode the address and use only the bits they want, as well as only store the bits they want. To the Microblaze, it looks like it is writing and reading memory just the same as normal RAM, but the underlying hardware is generating the values on the fly.
Your task in this assignment is to implement the address decoding to set the appropriate registers. The spec for the component is contained in the comments at the top of simulation_control.v as this is the file you'll need to modify. Finally, you'll use the core you've modified and some software on the Microblaze to play a song.
We've added a zip file of the full ActiveHDL project for the opb_string_simulation.
1. Make a new project in ActiveHDL very much like you've done in the past, but this time choose "Xilinx ISE 6.x XST VHDL/Verilog" for the synthesis tool instead of "Synplicity Synplify Pro 7.x". This is because different synthesis tools behave slightly differently. EDK uses XST for synthesis, so you'll want to use XST for doing your synthesis here as well.
2. Download the starter code and add it to your project. At this point, you should be able to compile it in Active and it should compile without errors or warnings. Set the tf_simulation_control module as the top level so that you'll be able to simulate it.
3. Modify the verilog code in simulation_control.v so that it behaves as described in the comments at the top of the file. Running it in the test fixture for about 2us should tell you if it implements the spec properly.
4. Attempt to synthesize your opb_string_simulation using XST. Again, this is the Synthesis button in the Design Flow tab in Active. If your component does not synthesize, you'll need to fix the errors, simulate it again, and then try again.
5. Now, you'll want to import your core into EDK. To do this:
Hit finish
At this point, restart EDK, and when you open up the add/edit cores dialog the opb_string_simulation should be there.
6. Build an EDK project that uses the opb_string_simulation and and an opb_uartlite. Merge the ucf file that came along with the source for your project with your ucf file that contains your RX and TX and SRAM assignments. This ucf file assumes that the uart transmit is named TX, the uart receive is named RX, and the opb_string_simulation's MCLK, BICK, ... PDN ports are connected to nets named MCLK, BICK, ... PDN, respectively.
You'll have to write some C code to run on the Microblaze. A system that enables the opb_string_simulation and then plucks a string when a key is received on the uart would probably be a good first thing to do. You'll probably find some useful functions in the xuartlite_l.h and xio.h header files.
As a hint, realize that if you named the opb_string_simulation instance to be the_string you set the master enable by writing 1 to the memory location XPAR_THE_STRING_BASEADDR + 0x00 and you can pluck string 0 by writing 0x8 to the memory location XPAR_THE_STRING_BASEADDR + 0x10
Watch out for the possibility of your program being bigger than the available ram. You might have to make your ram bigger than the default size.
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