Systolic Computers
Warp (CMU) - 1987
- linear array of 10 or more processing cells
- optimized inter-cell communication for low-latency
- pipelined cells and communication
- conditional execution
- compiler partitions problem into cells and generates microcode
i-Warp (Intel) - 1990
- successor to Warp
- two-dimensional array
- time-multiplexing of physical busses between cells
- 32x32 array has 20Gflops peak performance