Lecture: Virtual memory

preparation

• read the xv6 book: §2, Page tables

questions

• review lab 1 and the system call exercise
  • make sure you understand exercise 8, lab 1
  • can we directly call cmostime from date.c? if not, what will prevent us from doing that?
• start lab 2 now!
  • see the tools guide
  • enter/exit QEMU monitor using Ctrl-a c; try info pg
• how does the page table help with isolation?

paging

• pointers: virtual addresses
  • kernel: set up a page table
  • MMU: VA → PA translation & permission checking
  • TLB: cache translation results
  • now you understand what happens when you dereference a pointer, access an object field, etc.
  • basis for process isolation - see xv6
    • per-process page table: pgdir field in struct proc in proc.h
    • switch: switchuvm in vm.c
• x86 page table example: 4KB page size, two-level tree
  • see the xv6 book, Figure 2-1, x86 page table hardware
  • top-level: page directory
    • 1024 entries (PDE)
    • each PDE is 32-bit: address of page table page (20 bits) & flags (12 bits)
  • second-level: page table pages
    • each has 1024 entries (PTE)
    • each PTE is 32-bit: physical page address (20 bits) & flags (12 bits)
  • questions
    • would the physical RAM size affect the size of the page directory
    • how would you implement our QEMU’s info pg in JOS kernel monitor
• x86
  • let’s start with the 4K two-level paging
  • there are many other plans
  • programming interface
    • control registers
      • CR0: enable/disable paging
      • CR2: page fault address
      • CR3: physical address of the page directory
    • invlpg: invalidate TLB
      • TLB shootdown (multiprocessor)

example of page table

• read through JOS’s kern/entrypgdir.c
• examples: manually translate VA 0x00001234 and 0xF0001234