Lecture: scheduling

preparation

goal: virtualizing time
- each thread thinks it has a dedicated CPU
- kernel runs each in turn on a physical CPU
- analogy: virtual memory vs. physical memory
what components have we seen so far
- cooperative context switching
  - save/restore registers
  - each process voluntarily gives back the control
  - what if they don’t - user processes spin forever
- timer interrupt - who delivers these interrupts?
  - kernel takes back control forcefully
  - and gives control to next thread
today: combine both for scheduling

overview
- 1 user thread and 1 kernel thread per process
- 1 scheduler thread per processor
- locks to protect shared data structures and resources
kernel threads: similar to the uthreads exercise, but in kernel mode
- struct context in proc.h
  - no %eax, %ecx, %edx - who save them?
  - why %eip?
- cooperative scheduling
  - two switches: thread 1 → scheduler → thread 2
  - scheduler() in proc.c
  - swtch() in swtch.S
user threads: preemptive scheduling
- how to force a thread to give up control?
- per-processor timer interrupt (every 100 ms): user → kernel
- trap() (trap.c) → yield() (proc.c) → sched() (proc.c)
- switch to a different thread, then kernel → user
now you have a complete picture of how kernel works
- user space is running process p (say sh)
- p traps into the kernel upon timer (preemptive)
- the kernel switches from p to the scheduler (cooperative)
- the scheduler switches to q (say ls)
- q returns to user space to resume execution
scheduling policy: round robin
- will the thread that called yield() run immediately again?
- is the kernel always making the right decisions on when to preempt user space?
- see scheduler activations & more scheduling policies in the textbook
- 452: more scheduling in distributed systems and data centers
- what about JOS?

SMP: symmetric multiprocessing
- multiple identical processors
- each processor has a set of registers
- share the same memory, IO devices, etc.
terminology
- APIC (Advanced Programmable Interrupt Controller)
  - Intel 82093AA, Figure 2
  - Local APIC
  - I/O APIC
- ACPI (Advanced Configuration and Power Interface) tables
SMP booting
- BIOS boots up a BSP (bootstrap processor)
  - recall single-processor booting: BIOS → bootloader → OS kernel
- BSP boots up the APs (application processors)
  - discover SMP configuration through the ACPI tables
  - wake up APs with entry address through its Local APIC
- APs
  - receieve the entry address from BSP and start running
  - in what mode now, real or protected?
  - do we need to set up page tables, interrupt handlers, etc. again for each AP?
  - how to coordinate between multiple processors? lock kernel data structure?
more on ACPI tables
- who constructed the ACPI tables? where are they in memory?
- would the kernel overwrite & corrupt the tables?
- challenges: High Precision Event Timer (lab 4), PCI Express (lab 5)