Project 3: Memory & Cornell Note-Taking Method

Due on Thursday, January 27th at 11:59pm PST

Objectives

  • To apply the concept of sequential logic in physical designs
  • To understand how the abstraction of RAM lends itself well to scaling up

Part 0: Get the Starter Materials

To complete this assignment, you will need to use git to access the starter materials that have been pushed to your repository by the course staff. First, run git status and see if it reports any changes. If you have any, you'll need to commit them before proceeding (git add . followed by git commit -m "Your message here"). Then, run:

After running that command, you have synchronized the local copy of your repo with the copy on the server. Very rarely, you may get a "merge conflict" where git can't automatically figure out how to combine the changes we pushed to the server. If that happens, feel free to email the staff list to resolve the issue.

Part I: Cornell Note-Taking Method

Complete the Cornell Note-Taking assignment located in your repo at projects/3/cornell_notetaking.docx.

Pick a class that you are currently enrolled in and identify the lecture day in which you will practice using the Cornell note-taking method. Throughout the lecture, take notes as you typically would in capturing the material discussed in class but leave a 2.5" margin from the left of your document for generating questions. Following the conclusion of your class, create questions based on the notes that you had taken from class. Think of questions that may be asked of you for an upcoming assignment or exam, that strengthen your memory or understanding of the material or highlight connections between different parts of the class. At the bottom of your notes, summarize in your own words the key takeaways that were discussed in lecture. Once you have done your Cornell note-taking, take time to reflect on what that experience was like for you and address the following questions:

  1. What class did you try the Cornell note-taking method with?
  2. Discuss in 3- 5 sentences, what your typical note-taking practices look like? What aspects were similar or different to the Cornell note-taking method?
  3. Discuss in 3 -5 sentences, what barriers do you see that may prevent you from fully engaging in the Cornell note-taking method? What are ways that can help address this?

Record your answers in the document called cornell_notetaking.docx located in the projects/3 directory.

As part of this assignment, you will also need to submit a copy of your notes from the class you tried the Cornell Note-Taking method with. If you handwrite your notes, insert a picture of your notes within the document. If you take notes electronically, insert a link within the document that allows us to access your notes, or include them as a separate file in your repo and clearly indicate within the main document where we can find them.

Edit the document "in-place" and submit by pushing to Gitlab.

Part II: Memory

Background

The computer's main memory, also called Random Access Memory, or RAM, is an addressable sequence of n-bit registers, each designed to hold an n-bit value. In this project you will gradually build a RAM unit. This involves two main issues: (i) how to use gate logic to store bits persistently, over time, and (ii) how to use gate logic to locate ("address") the memory register on which we wish to operate.

Overview

In this project, you will again build a set of chips. The only building blocks you can use are "primitives" (Nand, the "combinational primitive", and DFF, the "sequential primitive") as well as any previous chips (whether in previous projects or in this project). Remember that previous projects list "additional chips" you did not implement, but are allowed to use! As before, we highly recommend you implement in the order listed here.

Chip Name Description Test Script Expected Output
DFF Data Flip-Flop (primitive)
Bit 1-bit register Bit.tst Bit.cmp
Register 16-bit register Register.tst Register.cmp
RAM8 16-bit, 8-register memory RAM8.tst RAM8.cmp
RAM64 16-bit, 64-register memory RAM64.tst RAM64.cmp
RAM512 16-bit, 512-register memory RAM512.tst RAM512.cmp
RAM4K 16-bit, 4096-register memory RAM4K.tst RAM4K.cmp
RAM16K 16-bit, 16384-register memory RAM16K.tst RAM16K.cmp
PC 16-bit program counter PC.tst PC.cmp

Contract

When loaded into the supplied Hardware Simulator, your chip design (modified .hdl program), tested on the supplied .tst script, should produce the outputs listed in the supplied .cmp file. If that is not the case, the simulator will let you know. You do not have to implement the DFF chip as it's considered primitive.

Resources

You will find Chapter 3 helpful for this project. More details about sequential logic in HDL can be found in Appendix A. Since you will be depending heavily on chips from Projects 1 & 2, you may find this Chip Set Overview helpful to look up the chip signature (i.e. names of connections) for the chips you need. Like the previous projects, you may also find this HDL Survival Guide written by Mark Armbrust helpful.

Tips

The DFF gate is considered primitive, so you do not have to implement it. When the simulator encounters it in other chips, the built-in version will be used.

RAM memory usage: When building progressively larger versions of RAM, your implementation will require the hardware simulator to process an enormous number of recursive underlying chips. In order to avoid running out of memory (and significantly speed up the simulation), we've partitioned this project into two folders: "normal" and "large". That way, when you implement the "large" RAM chips in their own folder, they will use the built-in implementations of the smaller RAM chips, which are much more optimized. Note: the folder division is for efficiency purposes only, and has no deeper meaning beyond that. After implementing the "large" RAM chips, you will return to the "normal" folder to implement PC.hdl.

Part III: Social Computing Reflection

In Project 2, you had the opportunity to reflect on a specific application of boolean arithmetic and binary overflow by reading about an example of societal impact caused from Buffer Overflow. In this past week, we have explored the topic of Sequential Logic and Memory, which is an important stepping stone for us to build up to a computer. Besides just a computer, however, Sequential Logic and Memory also plays a pivotal role in many other technologies that we see on a daily basis. When we focus on learning just the core technical concepts of a class, we often overlook the connection that it has to society and how we as humans either benefit or are harmed by the technology we are studying at hand. For this week's social computing reflection, you will examine one application of how Sequential Logic and Memory plays out in the real world. Some examples of where we see Sequential Logic and Memory include Traffic Lights, patterns from Airport Lighting Aids, clocks, a vending machine, or an electronic door lock. Find one reading on your own in which you can learn more about an application of Sequential Logic and Memory besides a computer, and answer the questions in the Word document p3_social_computing.docx. Here are some questions that you may consider or address in answering the prompts in the Word document:

There is a document called p3_social_computing.docx located in the projects/3 directory where you can complete the reflection. Edit the document "in-place" and submit by pushing to GitLab.

Submitting

To submit your project, make sure you commit and push your changes, then tag them as project-3 and push that tag as well:

Then, verify that the tag and all your code is uploaded correctly by checking on gitlab.cs.washington.edu.

Project Skills and Passing Requirements

Below are the skills you need to demonstrate in order to pass this project, along with concrete tasks we expect you to complete to demonstrate each skill. Remember that in order to receive a passing grade for the class, you must receive a passing grade on each project. Only completing the bare minimum to pass a project will result in a low grade. See the syllabus for more details and let us know if you have any questions.