Lab 1: Parking Lot Occupancy Counter

Assigned
Tuesday, March 26, 2024
Due Date
Friday, April 5, 2024 at 11:59 pm

Overview

This lab is a refresher on finite state machines (FSMs) that you learned about and designed in EE271 or CSE369. Be sure to read the and before getting started so you know what information to collect and present as you go.

Parking Lot Occupancy Counter

Consider a parking lot with a single gate for both entry and exit. To keep track of the occupancy of the lot, we decide to use two photosensors to track when cars enter or exit, as shown in the figure below.

When an object is between the photo transmitter and the photo receiver, the light is blocked and the corresponding output is asserted to 1. By monitoring the events of both sensors, we can determine whether a car is entering or exiting, or even if a pedestrian is passing through! You may assume that two cars won't be entering/exiting at the same time and that you don't have to worry about multiple pedestrians mimicking a car (i.e., if it looks like a car sequence, count it as a car).

For example, the following sequence indicates that a car entered:

  1. Initially, both sensors are unblocked (i.e., {outer, inner} == 2'b00).
  2. Sensor outer becomes blocked (i.e., 2'b10).
  3. Both sensors are blocked (i.e., 2'b11).
  4. Sensor outer becomes unblocked (i.e., 2'b01).
  5. Both sensors are unblocked (i.e., 2'b00).

Lab Code

Starting a Project

You can (1) start from a copy of an existing project folder from EE271 or CSE369 or (2) watch the following video on how to .

Helpful Project Files

The use of these are optional, depending on your preferred workflow. Versions of these should have been provided in EE271 and CSE369.

  • (to launch ModelSim from the directory instead of through Quartus)
  • (to script the ModelSim commands for simulation)

Code for this Lab

For .sv files, you may want to right-click and save/download instead of clicking.

Instructions

Design a Parking Lot Occupancy Counter as Follows

  1. Design and implement an FSM for the car detection with two input signals, outer and inner, and two output signals, enter and exit. The enter and exit signals assert true for one clock cycle when a car enters or exits the lot, respectively.
    1. You may assume that cars will not change direction while entering or exiting the parking lot.
    2. Make sure that your FSM does not detect/count invalid sensor sequences.
  2. Design and implement a car counter with two control signals, incr and decr, which increment and decrement the counter, respectively, when asserted.
    1. Assume that the maximum capacity of the parking lot is 16 spots.
  3. Design and implement a module for the parking lot occupancy, which combines the car detection and counter. Your system should have the following properties:
    1. Use off-board switches (i.e., not the SWs) to mimic the two photosensor outputs.
    2. Display the current car count on the seven-segment displays HEX1 and HEX0, with the following exceptions:
      1. If the counter reaches 16, display "FULL" on HEX5HEX2.
      2. When the lot is empty, display "CLEAR" on HEX5HEX1 and the number "0" on HEX0.
    3. Use 2 off-board LEDs (i.e., not the LEDRs) to indicate the values of the outer and inner signals.
      1. A logical 1 should turn the corresponding LED on and a logical 0 should turn it off.
TBD
Figure 2: LabsLand GPIO headers (from GPIO_Guide.pdf) for your reference.

Lab Requirements

Lab Report

Due by the end of Friday, submitted as a PDF on .

  • Include the required Design Procedure, Results, and Experience Report sections along with the other requirements listed in the .
  • As separate files, upload your commented SystemVerilog files (.sv), including test benches.

Lab Demo

Due within one week of the lab report deadline, but typically during your assigned demo slot or a scheduled office hour.

  • Demonstrate your working parking lot occupancy counter on the DE1-SoC.
  • Demonstrate your reset functionality.
  • Be prepared to answer 1-2 questions about your design to the TA.

Grading Rubric

Grading Criteria
Points
Name, student ID, lab number
2 pts
Design Procedure
  • System block diagram and diagrams for car detection and counting
12 pts
Results
  • Simulations for top-level and car detection (none needed for car counting)
  • Present state included in all FSM simulations
10 pts
Experience Report
6 pts
SystemVerilog code uploaded
5 pts
Code style
5 pts
LAB DEMO
20 pts
 
60 pts