1. For representing the behavior of the system. State Diagrams are the best way to represent finite state machines. Using state diagrams we can represent the behavior and functionality of an entire system in a finite number of states. By following the states in our code we can also trace the execution of the system.
2. Allows for Optimization of code by using different encodings. State Diagrams allow us to take advantage of different state encodings like sequential, random, gray code, one hot etc. to optimize our code. While generateing the reduced equations Synario also takes into account the state encoding we use in our program. By using state diagrams in ABEL we can make use of different encodings to get the one with the most optimized equations. This proves useful if we are in the process of mapping our design to a PLD (say E0320) and if our design does not fit because the reduced equations that were generated had more than 8 terms then we can try to use different encodings to reduce the number of terms in our equation. It is not guaranteed that this would reduce the number of terms but there is definetely a possibility. We could also try reducing the number of state bits to make our design fit. By using state diagrams we are provided with these different options for optimization.
ABEL provides the state_diagram key word to implement a Moore or Mealy state machine. Let Sreg be the state register composed of signals Q2, Q1, Q0 i.e Sreg is an alias for [Q2,Q1,Q0]. The basic syntax structure is as follows:
STATE_DIAGRAM Sreg
STATE 0:<statement block>
STATE 1:<statement block>
STATE 2:<statement block>
STATE 3:<statement block>
where the <statement block> consists of equations that define the state machines outputs and transitional statemnets which are IF-THEN-ELSE, CASE, or GOTO statements optionally followed by a WITH statement. Depending on the value of Sreg we go state 0, 1, 2, or 3. Although in the above syntax, states are listed in ascending order in general you need not specify them in any particular order. Before entering the state_diagram block Sreg must be assigned the value of the start state of your state machine. For instance if the start state of your machine is 0 then Sreg should be cleared to 0 before entering the state_diagram block. Here's an example of a simple state machine that moves from one state to next and sets it's output to the current state and then starts over again.
STATE_DIAGRAM state_num
STATE 0: out = 0;goto 1;
STATE 1: out = 1;goto 2;
STATE 2: out = 2;goto 3;
STATE 3: out = 3;goto 0;
Since in a Moore machine the outputs are asserted in the state and not on the arcs, hence to represent a Moore machine we would assert the ouptuts after we reach the particular state. To illustrate a Moore machine let's consider an example of the state machine that goes from one state to next setting it's outputs out1, out2, and out3 to 0 or 1 appropiately.
STATE_DIAGRAM state_num
STATE 0: out1 = 0; out2 = 1; out3 =0; goto 1;
STATE 1: out1 = 1; out2 = 0; out3 = 1; goto 2;
STATE 2: out1 = 1; out2 = 1; out3 = 0; goto 3;
STATE 3: out1 = 0; out2 = 0; out3 = 0; goto0;
In the above code, the values of the outputs out1, out2, and out3 are changed in the corresponding states. For instance, the values of the outputs out1, out2, and out3 are 0, 1, and 0 respectively in state0; 1, 0, and 1 in state2 and so on.
We know that in a Mealy machine the outputs are asserted on the transition arcs rather than in the state bubble. ABEL provides us with a WITH keyword which helps us to implement the Mealy machines. Hence the above code with the WITH statement would look like the following:
STATE_DIAGRAM state_num
STATE 0: goto 1 with {out1 = 0; out2 = 1; out3 = 1;}
STATE 1: goto 2 with {out1 = 1; out2 = 0; out3 = 1;}
STATE 2: goto 3 with {out1 = 1;out2 = 1; out3 = 0;}
STATE 3:goto 0 with {out1 = 0; out2 = 0; out3 = 0;}
In the above code the ouputs out1, out2, and out3 are asserted on reaching that particular state. Hence in our example above out1, out2 and out3 would have a value of 0, 1, and 1 respectively when state1 is reached; 1, 0, and 1 when state2 is reached and so on.
Apart from goto and with we can also have IF-THEN-ELSE statements to express the control-flow in the state diagram descriptions.
In the Mealy machine example above, if we wanted to change our outputs only when the start input was asserted and the reset input was 0 and otherwise stay in state0, then the state diagram for Mealy machine would look like this:
STATE_DIAGRAM state_num
STATE 0: if !reset then
if start then goto 1 with {out1 = 0; out2 = 1; out3 = 1;}
else goto 0;
STATE 1: if !reset then
if start then goto 2 with {out1 = 1; out2 = 0; out3 = 1;}
else goto 0;
STATE 2: if !reset then
if start then goto 3 with {out1 = 1;out2 = 1; out3 = 0;}
else goto 0;
STATE 3: if !reset then
if start then goto 0 with {out1 = 0; out2 = 0; out3 = 0;}
else goto 0;
The following is a simple example in ABEL which demonstrates the use of state diagrams in ABEL. This example puts together the sections of code discussed earlier in the page. Notice the use of aliases to name the state bits and the use of nodes to create internal registers for the state bits.
module Example
interface (clk, start, reset -> out1, out2, out3);
title 'A simple example'
"Inputs
clk, reset, start pin;
"Outputs
out1, out2, out3 pin istype 'com';
"Internal Registers to represent the state bits
Q1, Q0 node istype 'reg, buffer';
"Aliases
S0 = [0, 0];
S1 = [0, 1];
S2 = [1, 0];
S3 = [1, 1];
StateReg = [Q2, Q1, Q0];
EQUATIONS
StateReg.clk = clk;
StateReg.clr = reset;
state_diagram StateReg
state S0: if !reset then
if start then goto S1 with {out1 = 0; out2 = 1; out3 = 1;}
else goto S0;
state S1: if !reset then
if start then goto S2 with {out1 = 1; out2 = 0; out3 = 1;}
else goto S0;
state S2: if !reset then
if start then goto S3 with {out1 = 1;out2 = 1; out3 = 0;}
else goto S0;
state S3: if !reset then
if start then goto S0 with {out1 = 0; out2 = 0; out3 = 0;}
else goto S0;
end