Decoders

• General concept

  • N control inputs: “address”
  • 2n outputs:
  • One output is asserted: 1-hot
    • Address selects the output to assert
  • Enable input used to turn decoder on/off

• A decoder computes all minterms:

1:2 Decoder:

Out0 = S’

Out1 = S

2:4 Decoder:

Out0 = S1’ ? S0’

Out1 = S1’ ? S0

Out2 = S1 ? S0’

Out3 = S1 ? S0

3:8 Decoder:

Out0 = S2’ ? S1’ ? S0’

Out1 = S2’ ? S1’ ? S0

Out2 = S2’ ? S1 ? S0’

Out3 = S2’ ? S1 ? S0

Out4 = S2 ? S1’ ? S0’

Out5 = S2 ? S1’ ? S0

Out6 = S2 ? S1 ? S0’

Out7 = S2 ? S1 ? S0

Previous slide

Next slide

Back to first slide

View graphic version