What is the optimal gate realization?
We use the axioms and theorems of Boolean algebra to optimize our designs
- Subject of the next lecture
Design goals can vary, depending on the technology
- Reduce the number of inputs?
- Reduce the number of gates?
- Reduce number of gate levels?
How do we explore the tradeoffs?
- CAD tools
- logic minimization: reduce number of gates and complexity
- logic optimization: minimization versus speed and delay