PPT Slide
Fundamental building block of circuits with state
- latch and flip-flop
- R-S latch, R-S master/slave, D master/slave, edge-triggered D flip-flop
Timing methodologies
- use of clocks
- cascaded FFs work because propagation delays exceed hold times
- beware of clock skew
Asynchronous inputs and their dangers
- synchronizer failure: what it is and how to minimize its impact
Basic registers
- shift registers
- pattern detectors
- counters