PPT Slide

5 – Sequential Logic

© 1996 Gaetano Borriello

Four-bit binary synchronous up-counter

45

• Standard component with many applications

  • synchronous load and clear inputs
  • positive edge-triggered FFs
  • parallel load data from D, C, B, A
  • enable inputs: must be asserted to enable counting
  • RCO: ripple-carry out
    • high when counter is in its highest state 1111
    • implemented using an AND gate
    • used for cascading counters

(1) Low order 4-bits = 1111

(2) RCO goes high

(3) High order 4-bits are incremented

Previous slide

Next slide

Back to first slide

View graphic version