PPT Slide

5 – Sequential Logic

© 1996 Gaetano Borriello

Universal shift register

• Holds 4 values

  • serial or parallel inputs
  • serial or parallel outputs
  • permits shift left or right
  • shift in new values from left or right

39

clear sets the register contents and output to 0s1 and s0 determine the shift function  s0 s1 function 0 0 hold state 0 1 shift right 1 0 shift left 1 1 load new input

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