Multiplexers/selectors (cont'd)

3 – Combinational Logic Implementation

© 1996 Gaetano Borriello

32

2 -1

n

• 2:1 mux: Z = A' I0 + A I1

• 4:1 mux: Z = A' B' I0 + A' B I1 + A B' I2 + A B I3

• 8:1 mux: Z = A' B' C' I0 + A' B' C I1 + A' B C' I2 + A' B C I3 + A B' C' I4 + A B' C I5 + A B C' I6 + A B C I7

• In general, Z = ? m I

  • in minterm shorthand form for a 2 :1 Mux

k k

k=0

n

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