PPT Slide

3 – Combinational Logic Implementation

© 1996 Gaetano Borriello

Conversion of multi-level logic to NANDs

13

F = A (B + C D) + B C'

original

AND-OR network

introduction and

conservation of bubbles

redrawn in terms

of conventional

NAND gates

Level 1 Level 2 Level 3 Level 4

A

C

D

B

B

\C

F

Previous slide

Next slide

Back to first slide

View graphic version