PPT Slide
3 – Combinational Logic Implementation
Two-level logic using NAND and NOR gates
NAND-NAND and NOR-NOR networks
- de Morgan's law: (A + B)' = A' • B' (A • B)' = A' + B'
- written differently: A + B = (A' • B')' (A • B) = (A' + B')'
In other words ––
- OR is the same as NAND with complemented inputs
- AND is the same as NOR with complemented inputs
- NAND is the same as OR with complemented inputs
- NOR is the same as AND with complemented inputs