Metastability and asynchronous inputs
Clocked circuits are synchronous
- Signals change between clock edges
- System state changes at the clock edges
Unclocked signals or circuits are called asynchronous
- Asynchronous circuits have no master clock
- An R-S latch is an asynchronous circuit
- Asynchronous input signals are not synchronized to a clock edge
- Real-world inputs (e.g. a keypress) are asynchronous
Synchronous circuits have asynchronous inputs
- Cannot be avoided (e.g., reset signal, memory wait, user input)
- Inputs can change at any time
- Will often violate setup/hold times