Welcome. Please visit here for basic course information and links to the webs for earlier quarters.

Prof. Georg Seelig

CSE 228, Office Hours by Appointment


Bin Yu (by23@uw.edu)
Yashin Chen (yashinc@uw.edu)

Lab Hours (when TAs are present): CSE 003,
Wed 2:30-5:30
Thu 2:30-5:30

Lecture Notes

The slides that will be used in class will be useful as starting points for you as you take notes during class. Slide decks will still undergo (minor) editing so make sure to get the latest version shortly before the class.

Part01: Intro combinational circuits
Part02: Verilog for combinational circuits
Part03: kmaps
Part04: Sequential circuits and flipflops
Part05: Flipflop realities
Part06: Finite state machines
Part07: Numbers and adders
Part08: Multiplexers
Part09: Registers and counters
Part10: FPGAs

Annotated lecture notes will be posted here at the end of each week:

Week 1 notes (Intro combinational circuits)
Week 2 notes (Combinational circuits and verilog)
Week 3 notes (kmaps)
Week 4 notes (Sequential circuits and flip flops)
Week 5 notes (Flip flop realities)
Week 5 notes (FSMs)
Week 6/7 notes (Numbers and Adders)
Week 7 notes (Encoders, Decoders, Multiplexers)
Week 8 notes (Registers, Counters, RAMs)


Lab boards have been donated by Altera, Inc.

Lab assignments for the quarter will be posted here, along with their due dates. Labs 1-7 will be due during the week specified, during your demo slot (demo slot signup sheet will be posted soon). You should actually do the lab during the previous week. Lab #8 is due by 5pm on the date specified.

Lab 1 Lab start January 4, due January 11-15
Lab 2 Lab start January 11, due January 18-22
Lab 3 Lab start January 18, due January 22-29
Lab 4 Lab start January 25, due February 1-5
Lab 5 Lab start February 1, due February 8-12
Lab 6 Lab start February 8, due February 15-19
Lab 7 Lab start February 15, due February 22-26
Lab 8 Lab start February 22, due March 7-11, 5pm

The Quartus II tutorial, for labs #1 and #2, is here.

The Lab #1 files for Quartus are here.

Most of your labs will involve Verilog. The class Verilog tutorial is here. There is also a Verilog Quick Reference Card that may be of interest.

A overview on how to use 4x4 or 8x8 LED arrays is here for some projects in lab #8.

Labs on student machines

If you want to use your own machine to do your labs, then grab the Quartus 14.0 files here.

If you are using a laptop, you can bring it to the lab for demos. If you are using your own desktop machine, or don't want to haul your laptop to lab, you can FTP your files to the lab machines. You may want to use Dropbox, Google Docs, or some other cloud storage account as an intermediate - upload the files from your machine to your Dropbox (for instance) account, then download the files to the lab PCs. It is easiest to just send the entire contents of your lab file, since you'll want the design files, schematics, project, etc. IF YOU ARE DOING THIS, TEST IT BEFORE YOUR DEMO TIME.


Quiz 1: Tue Feb 2, first 20 minutes of class. Quiz 2: Tue Feb 23, first 20 minutes of class. Final: Mon March 14, 10:30-11:20 (only 50 min, not two hours)

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