CSE 471 Autumn 1998 (Baer): Computer Organization and Design

Lecture Slides

Lecture 1 Introduction to Verilog

Lecture 2 Instruction Execution in Multiple Cycle Implementation

Lecture 4 A few simple Verilog modules

Lecture 5 A few simple Verilog modules( con'td)

Lectures 3 and 6 Pipelining data path

Lectures 7 to 9 Branch prediction

Lecture 10 Exceptions

Lecture 11 Multiple pipes

Lectures 12 to 14 Instruction level parallelism. Scoreboard. Tomasulo's algorithm

Lecture 15 Register renaming. Reorder buffer. Superscalars

Lecture 16 Project infrastructure

Lectures 17 and 18 Project infrastructure

Lectures 18 and 20 Floating-point arithmetic

Lectures 21 and 22 Cache Basics (review)

Lectures 23 and 24 Cache Performance (see also handout in postscript)

Lectures 25 and 26 Main memory

Lectures 26 and 27 Virtual memory

Lectures 27 and 28 Multiprocessors - Snoopy protocols

Lecture 29 Synchronization

	Lecture 1	Introduction to Verilog
	Lecture 2	Instruction Execution in Multiple Cycle Implementation
	Lecture 4	A few simple Verilog modules
	Lecture 5	A few simple Verilog modules( con'td)
	Lectures 3 and 6	Pipelining data path
	Lectures 7 to 9	Branch prediction
	Lecture 10	Exceptions
	Lecture 11	Multiple pipes
	Lectures 12 to 14	Instruction level parallelism. Scoreboard. Tomasulo's algorithm
	Lecture 15	Register renaming. Reorder buffer. Superscalars
	Lecture 16	Project infrastructure
	Lectures 17 and 18	Project infrastructure
	Lectures 18 and 20	Floating-point arithmetic
	Lectures 21 and 22	Cache Basics (review)
	Lectures 23 and 24	Cache Performance (see also handout in postscript)
	Lectures 25 and 26	Main memory
	Lectures 26 and 27	Virtual memory
	Lectures 27 and 28	Multiprocessors - Snoopy protocols
	Lecture 29	Synchronization