From: Greg Green (ggreen_at_cs.washington.edu)
Date: Tue Feb 10 2004 - 22:05:59 PST
This paper describes the Mach virtual memory management design. It was
designed to be easily portable to multiple types of hardware. The
design supports large, sparse virtual addresses, copy-on-write,
copy-on-write and read-write memory sharing between tasks, memory
mapped files, and user-provided backing store and pagers.
Tasks can modify there addresses by allocating a region, deallocating
a region, setting the protection status, specifying the inheritance of
a region, and manage a memory object that can be mapped into the
address space of another task.
The implementation consists of a page table, an address map, memory
objects, and the pmap. The memory for a task consists of a linked list
of memory objects. The address map is a linked list of mapping between
addresses and a memory object. This map contains the protection bits
for the pages, as well as the inheritance information.
The memory object is an abstraction over the backing store. The
backing store can be memory, shared-memory, a file, even a remote
computer. This is accomplished by associating a user-space pager with
each memory object. This pager provides the backing store
implementation for the various types. The memory objects are reference
counted and garbage collected.
Shared memory is implemented by a type of memory object called a
shadow object. This is basically an object that keeps track of which
regions of another memory object have been changed. Therefore it
doesn't need to be a complete copy of the other memory object. The
shadow objects can be chained ad-infinitum. The complexity arises in
trying to manage these chains.
Machine independence is provided by putting all specific machine
knowledge in the pmap. This is a set of operations that must be
implemented for each architecture. Since this is only one file, the vm
should be easy to port to other architectures.
The rest of the paper talked about specific architectures and some
performance measurements which showed that the performance was quite
good even with the hardware abstracted away.
This paper addressed the virtual memory manager at a higher level than
the previous VMS paper. It also spent some time describing mach
architecture and specific machines. So it wasn't as detailed.
It was interesting how the object-oriented operating system showed up
again with the concept of memory objects. This is quite a neat
concept. It would be interesting to hear more about how the chains of
shadow objects were managed. That sounds quite difficult and wasn't
really addressed.
I also wonder about the emphasis placed on portability. These days
that seems misplaced since there isn't a whole lot of different
hardware types left. I suppose things may change in the future and
this emphasis may again be useful.
-- Greg Green
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