Welcome to Computer Architecture, taught by Prof. Luis Ceze with Vincent Lee and Mark Wyse.

This website will be updated throughout the quarter, so check back for the latest.

Course Overview


This is the planned lecture schedule. It will get filled in as we go, so please check back.

Each week there will be several readings, including some textbook chapters and influential research papers. Some readings will be marked (required), while the rest are suggested, but highly recommended. In addition, a few of the research papers will require an additional commentary as a homework assignment (bolded). The commentary should be a paragraph describing what you found most interesting or surprising, or asking questions that you have. These commentaries should be submitted to the Catalyst dropbox by the due date given on Catalyst.

(subject to change -- do not start a homework before the assigned date)

Date Topic & Readings Homework Assignments
October 1st (Thursday)

Introduction / Metrics / Performance / Power / Energy / The ISA

October 8th (Thursday)

ISA Part 2 / Pipelining Review / Branch Prediction

October 15th (Thursday)

Superscalar / Dynamic Scheduling / Multithreading

October 22nd (Thursday)

Memory Hierarchy / Caches / Virtual Memory / Non-volatile RAM

October 29th (Thursday)

Clusters/ Software Distributed Shared Memory / FPGA

November 5th (Thursday)

Cache Coherence

November 9th (Monday)

Homework 4 Due

November 12th (Thursday)

Memory Consistency Models / Transactional Memory

November 19th (Thursday) Guest Lectures (normal class time)

GPUs by Brad Beckman (AMD) / 3D Stacking by Gabe Loh (AMD)

November 26th (Thursday)


  • NONE

December 2nd (Wednesday)

Homework 5 Due

December 3rd (Thursday)

Optional Office Hours - 6:30 PM to 8:00 PM

December 6th (Sunday)

Homework 6 Due (Extra Credit) - NO LATE DAYS ALLOWED

December 10th (Thursday)

Warehouse-Scale Computing / Dennard Scaling / Dark Silicon / Specialization / XBox One / Wrap Up / Conclusion

Reading suggestions mentioned in class in passing

Architecture Support for Disciplined Approximate Programming

HardBound: Architectural Support for Spatial Safety of the C Programming Language

Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers