Issue and Dispatch
Split the ID stage into:
- Issue : decode instructions; check for structural hazards -- at least, maybe more hazards such as WAW depending on implementations -- . Stall if there are any. Instructions pass in this stage in order
- Dispatch: wait until no data hazards then read operands. At the next cycle a functional unit, i.e. EX of a pipe, can start executing
Example revisited.
R1 = R2/ R3 (long latency; in execution)
R2 = R1 + R5 (issue but no dispatch because of RAW on R1)
R6 = R7 - R8 (can be issued, executed and completed before the other 2)