Highlights from last week (c’ed)

• BTB (Branch Target Buffer) = BPT + Target address

  • Prediction and target address “computation” occur during IF cycle
  • Possibility of decoupling a (large) BPT and a (smaller) BTB

• Correlated -- or 2-level – branch prediction

  • Relies on history of outcome of previous branches to predict current branch
  • Many variations on the number of (shift) registers recording branch history and the number of Pattern History Tables (PHT) storing the 2-bit saturating counters

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