CPU-centric operations (arith-logical)
Registers-only (load-store architectures)
- Synonym with RISC? In general 3 operands (2 sources, 1 result)
- Fixed-size instructions. Few formats.
Registers + memory (CISC).
- Vary between 2 and 3 operands (depends on instruction formats). At the extreme can have n operands (Vax)
- Variable-size instructions (expanding opcodes and operand specifiers)
Stack oriented
- Historical? But what about JVM byte codes
Memory only (historical?)
- Used for “long-string” instructions