Course outline (cont’d)

• Weeks 5 and 6

  • Caches and performance enhancements.
  • TLB’s

• Week 7

  • Hardware/software interactions at the Virtual memory level

• Week 8

  • Buses
  • Disk

• Weeks 9 and 10

  • Multiprocessors. SMP. Cache coherence
  • Synchronization

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