Shared Memory Multiprocessors

Table of Contents

Shared Memory Multiprocessors

Basic Architecture of SMP

Cache Coherency -- The Problem

Cache Coherency, The Goal

Snooping To Solve Coherency

Snooping At Work

Write-through Coherency

Applying The WT Protocol

Partial Order On Memory Operations

Memory Consistency

SC -- Sequential Consistency

Write Atomicity

Sufficient Conditions For SC

Basic Write-back Snoopy Cache Designs

MSI Protocol

MSI In Action

MESI (Illinois) Protocol

Dragon -- An Update Protocol

Dragon Protocol

Dragon In Action

Assessing trade-offs

Protocol Optimizations: Worth It?

Caching Properties

Cache-block size

Block Size Affects Traffic

Update vs Invalidate

Update vs Invalidation

There’s More To Story

Synchronization

Simple Software Lock

Test&Set Is A Simple Solution

Performance Of a Lock

Performance Goals of Locks

Improved Hardware Primitives

Sample Use of LL-SC

Performance

Software Implications

Email: snyder@cs.washington.edu

Home Page: http://www.cs.washington.edu/education/courses/596/CurrentQtr/

Other information:
CSE 596: Parallel Computation

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