23
Architecture (continued)
•Symmetric-multiprocessors
(SMPs) are an effective way to share memory on a small scale
•Cache
controllers snoop memory bus
•The
bus becomes the “time sequencing” point of the system, where modification order
is defined
•Various protocols speed performance with greater complexity
•“DSM
Homework sharing” would be reasonably efficient on SMP … cost only about ‘2x’
over non-share
•Bus is
serially used, limiting generalization to small #s
SMP is a standard architecture