Relaxing Write-to-Read Program Order
•While a write miss is in the write
buffer and not yet visible to other processors, the processor can
issue and complete reads that hit in its cache or even a single read
that misses
in its cache. TSO and PSO allow this.
•This
matches intuition often …
•This
code works as expected
P0 P1 P0 P1
A=1; while (Flag==0)do;
A=1; print B;
Flag=1; print A;
B=1; print A;
