Instead Let P2’s Request Be Write 6
•That is … this action replaces the previous slide
•Dirty bit is ON
•Home notifies owner Py of Px’s write request
•Py controller invalidates its block, sends data to Px
•Home clears yth presence bit, turns xth bit ON and dirty bit stays ON
–
P1
a:I:4
Controller
a:4
10010
P2
a:M:6
Controller
P3 
a:I:5
Controller
P0
a:I:4
Controller
Interconnection Network
Msg: P2 to P1, Write a
Msg: P1 to P3, P2 asking
Msg: P3 to P2, Here’s a