Cache Coherency -- The Goal
A multiprocessor
memory system is coherent if for every location there exists a serial
order for
the operations on that location consistent with the results of the execution such
that
•The
subsequence of operations for any processor are in the order issued
•The value returned by each read is the value written by the last write
in serial order
p1:i, p3:j, p2:k, p1:i+1, p3:j+1, ...
P1
4 5
P2
P3
4
4 5
Memory
a
a
w:a
r:a
