Von Neumann (RAM) Model
•Call
the ‘standard’ model of a computer (RAM) the von Neumann model
•A
processor interpreting 3-address instructions
•PC
pointing to the next instruction of program in memory
•Flat,
randomly accessed memory requires 1 time unit
•Memory
is composed of fixed-size addressable units
•One instruction executes at a time, and is completed before the next
instruction executes
•The
model is not literally true, e.g., memory is hierarchical but made to “look
flat”
C directly implements this model in
a HLL