The end of scaling...

• Reasonable projections (Hu, Mead): We will be able to engineer devices down to a 0.03µm channel length

  • ~10 more year of scaling

• Projected transistor density at a 0.03µm: 5 million / mm2

  • A 15mm×15mm die can have ~ 1billion transistors
  • Issue 1: Power loss increases
  • Issue 2: Can we build design/fab the interconnect

• Projected clock rate at 0.03µm: 40GHz

  • Issue 1: Signals travel only 4mm in one clock period
    • Wires longer than 0.4mm look like antennas
  • Issue 2: Short-channel effects reduce effective speedup

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