Date | Presenter | Paper / Topic |
Oct. 8 | Allan | Matrix |
Oct. 15 | Aaron | Parallel CAD - Placement |
Oct. 22 | Ken | The Design of a Low Energy FPGA |
Energy-Efficient FPGA Interconnect Design | ||
Oct. 29 | Benjamin | Power Modeling and Characteristics of Field Programmable Gate Arrays |
High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs | ||
Nov. 5 | Brian | HARP: Hard-wired Routing Pattern FPGAs |
A Novel Low-Power FPGA Routing Switch | ||
Nov. 19 | Stephen | Activity Esitmation for Field-Programmable Gate Arrays |
Dec. 1 | Mike | Tabula Patents |