CSE 590cc: Configurable Computing Seminar

CSE 590cc: Configurable Computing Seminar

Description: This seminar will survey some of the current research in configurable computing. The quarter will start with project presentations from Fall 99, and then continue with background and presentations of current research papers. Other research papers may also be discussed.

Thursday 12:30-1:20 - EE1 025

Paper Presentations

A more detailed bibliography and links to the papers follows this table.
Remember: Send a question or comment about the paper to the presenter by midnight Wednesday.

Title	Team	Presentation Date
Programmable Active Memories: Performance Assessment	Pat (tressel@cs)	Jan. 27
Reconfigurable Computing: Solution to Low Power Programmable DSP	Dmitriy (dportnov@cs)	Feb. 3
Building and Using a Highly Programmable Logic Array	Kevin (rennie@u)	Feb. 10
JHDL - An HDL for Reconfigurable Systems	Li (zl@ee)	Feb. 17
Cheops: A Reconfigurable Data-Flow System for Video Processing	Naomi, John (naomir@cs, naeglej@cs)	Feb. 24
A High-Performance Flexible Architecture for Cryptography	Tom (tfry@u)	Mar. 2
SCORE: Stream Computations Orgranized for Reconfigurable Execution	Chandi (chandi@ee)	Mar. 9

Papers

Papers scheduled to be presented:

(January 27) - Jean E. Vuillemin, Patrice Bertin, Didier Roncin, Mark Shand, Hervé Touati, and Philippe Boucard. Programmable Active Memories: Reconfigurable Systems Come of Age. IEEE Transactions on VLSI Systems, 4(1):56--69, March 1996 [PS]
(January 27) - Bertin Patrice, Roncin Didier, and Vuillemin Jean. Programmable Active Memories: a Performance Assessment. PRL Research Report #24, 1993 (PDF)
(February 3) - Jan M. Rabaey, Reconfigurable Computing: The Solution to Low Power Programmable DSP, Proceedings 1997 ICASSP Conference, Munich, April 1997 [PDF]
(February 3) - Marlene Wan, Hui Zhang, Varghese George, Martin Benes, Arthur Abnous, Vandana Prabhu, Jan Rabaey, Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System, Journal of VLSI Signal Processing, 2000 [PDF]
(February 10) - Maya Gokhale, William Holmes, Andrew Kopser, Sara Lucas, Ronald Minnich, Douglas Sweely, and Daniel Lopresti. Building and Using a Highly Programmable Logic Array. IEEE Computer, 24(1):81--89, January 1991. [PDF]
(February 17) - Peter Bellows, Brad Hutchings: JHDL-An HDL for Reconfigurable Systems, in Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, April 1998. [PDF]
(February 24) - Vincent Michael Bove, Jr. and John A. Watlington. Cheops: A Reconfigurable Data-Flow System for Video Processing. IEEE Transactions on Circuits and Systems for Video Technology, 5(2):140--149, April 1995. [HTML]
(March 2) - R. Reed Taylor and Seth Copen Goldstein A High-Performance Flexible Architecture for Cryptography in CHES 1999. [PDF]
(March 9) - SCORE: Stream Computations Organized for Reconfigurable Execution [HTML]

Other possible papers:

André DeHon. Comparing Computing Machines. SPIE CC: Tech and App., August 1998. [PS]
M. J. Wirthlin, B. L. Hutchings. Improving Functional Density Through Run-Time Constant Propagation, in ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 86-92 (1997). [PS]
André DeHon. Multicontext Field-Programmable Gate Arrays. 1997. [PS]
John R. Hauser and John Wawrzynek. Garp: A MIPS Processor with a Reconfigurable Coprocessor, in Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97, April 16-18, 1997), pp. 24-33 [ PS]
Ronald Laufer, R. Reed Taylor, Herman Schmit PCI PipeRench and the SwordAPI --- A System for Streaming-based Reconfigurable Computing in FCCM 1999. [PS]
Stephen Brown and Jonathan Rose. FPGA and CPLD Architectures: A Tutorial. IEEE Design and Test of Computers, 13(2):42--57, Summer 1996. [PS]
B. S. Landman and R. L. Russo. On Pin Versus Block Relationship for Partitions of Logic Circuits. IEEE Transactions on Computers, 20:1469--1479, 1971. (Classic paper showing empirical evidence for Rent's Rule.)

Project Presentations

Each group will have 25 minutes to talk about how their algorithm works and discuss interesting aspects of their Rapid-C program.

Application	Team	Presentation Date
MPEG: Motion Estimation &\| 2D DCT	Valentin	Jan. 13
Communication: CDMA &\| FFT	Guanbin	Jan. 20
Image processing: 2D Median filter	Kevin	Jan. 6
Radar correlation problem	Tom, Shawn, Bart	Dec. 9
Image processing: resampling/interpolation	Dmitriy	Jan. 13
String matching/DNA sequence analysis	Naomi, Tony, John	Jan. 6

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