CSE 590cc: Configurable Computing Seminar

Description: This seminar will survey some of the current research in configurable computing. The quarter will start with presentations scheduled during the Winter quarter and continue with presentations of projects and current research papers. Other research papers may also be discussed.

Monday 2:30-3:20 - LOW 102

Paper Presentations

A more detailed bibliography and links to the papers follows this table.
Remember: Send a question or comment about the paper to the presenter by midnight Sunday.

Title	Presenter(s)	Email	Date
Cheops: A Reconfigurable Data-Flow System for Video Processing	Naomi, John	naomir@cs, naeglej@cs	Mar. 27
Garp: A MIPS Processor with a Reconfigurable Coprocessor	Tom	tfry@u	Apr. 3
Configuration Caching Management Techniques for Reconfigurable Computing Main, Compress, Don't Care	Zhiyuan	zl@ee	Apr. 10
No Class - FCCM			Apr. 17
Discussion of interesting FCCM papers. (EE/CSE 203)	Ebeling, Hauck		Apr. 20
Molecular Computing (see below)	Larry McMurchie	larry@ee	Apr. 24
A bandwidth-efficient architecture for media processing and VLSI architecture: past, present, and future	Pat	tressel@cs	May 1
Page Based Intelligent Memory Paper & Project Website	Dmitriy	dportnov@cs	May 8
Pathfinder and Convergence Background & Recent Paper	Chandi	chandi@ee	May 15
Automatic architectural synthesis of VLIW and EPIC processors	Shawn	phillips@ee	May 22
Memorial Day			May 29

Papers

Papers scheduled to be presented:

(March 27) - Cheops: A Reconfigurable Data-Flow System for Video Processing, Vincent Michael Bove, Jr. and John A. Watlington. . IEEE Transactions on Circuits and Systems for Video Technology, 5(2):140--149, April 1995. [HTML]
(April 3) - Garp: A MIPS Processor with a Reconfigurable Coprocessor, John R. Hauser and John Wawrzynek. Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97, April 16-18, 1997), pp. 24-33 [ PS]
(April 10) - Configuration Caching Management Techniques for Reconfigurable Computing, Z. Li, K. Compton, S. Hauck; Northwestern University, IEEE Symposium on FPGAs for Custom Computing Machines, April 2000. [PDF]
(April 10) - Configuration Compression for the Xilinx XC6200 FPGA, Scott Hauck, Zhiyuan Li, Eric Schwabe, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 8, pp. 1107-1113, August, 1999. [PDF]
(April 10) - Don’t Care Discovery for FPGA Configuration Compression, Scott Hauck, Zhiyuan Li, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. [PDF]
(April 17) - No class.
(April 24) - A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology, J. R. Heath, P. J. Kuekes, G. S. Snider, and R. S. Williams, Science, Vol. 280, 1716-1721, June 12, 1998.
(April 24) - Electronically Configurable Molecular-Based Logic Gates,, C. P. Collier, E. W. Wong, M. Belohradsky, F. M. Raymo, J. F. Stoddart, P. J. Kuekes, R. S. Williams, J. R. Heath, Science, Vol. 285, pp. 391, July 16, 1999.
(April 24) - Defect Tolerance on the Teramac Custom Computer, W. B. Culbertson, R. Amerson, R. J. Carter, P. Kuekes, G. Snider, Proceedings of the IEEE Symposium on field-Programmable Custom Computing Machines (FCCM '97), pp. 140, 1997. [PDF]
(May 1) - A bandwidth-efficient architecture for media processing, Rixner, S.; Dally, W.J.; Kapasi, U.J.; Khailany, B.; Lopez-Lagunas, A.; Mattson, P.R.; Owens, J.D., Microarchitecture, 1998. MICRO-31. Proceedings. 31st Annual ACM/IEEE International Symposium on , 1998 , Page(s): 3 -13. [PDF]
(May 1) - VLSI architecture: past, present, and future, Dally, W.J.; Lacy, S. Advanced Research in VLSI, 1999. Proceedings. 20th Anniversary Conference on , 1999 , Page(s): 232 -241. [PDF]
(May 8) - Exploiting ILP in Page-Based Intelligent Memory, Oskin, M.; Hensley, J.; Keen, D.; Chong, F.T.; Farrens, M.; Chopra, A. Microarchitecture, 1999. MICRO-32. Proceedings. 32nd Annual International Symposium on , 1999 , Page(s): 208 -218. [PDF] [Project Website]
(May 15) - Distributed-Memory Parallel Routing for Field-Programmable Gate Arrays, Pak K. Chan, Martine D.F. Schalg, University of California Santa Cruz, Santa Cruz, CA, Carl Ebeling, Larry McMurchie, University of Washington, Seattle WA.. [PS]
(May 15) - PathFinder: A Negotiation-Based Performance-Driven Router for FPGAs Larry McMurchie and Carl Ebeling, Dept. of Computer Science and Engineering University of Washington, Seattle, WA. [PDF]
(May 22) - Automatic architectural synthesis of VLIW and EPIC processors Aditya, S.; Ramakrishna Rau, B.; Kathail, V. System Synthesis, 1999. 12th International Symposium on , 1999 , Page(s): 107 -113 [PDF]

Other possible papers:

Comparing Computing Machines., André DeHon, SPIE CC: Tech and App., August 1998. [PS]
Improving Functional Density Through Run-Time Constant Propagation, M. J. Wirthlin, B. L. Hutchings. ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 86-92 (1997). [PS]
Multicontext Field-Programmable Gate Arrays André DeHon.. 1997. [PS]
PCI PipeRench and the SwordAPI --- A System for Streaming-based Reconfigurable Computing, Ronald Laufer, R. Reed Taylor, Herman Schmit in FCCM 1999. [PS]
FPGA and CPLD Architectures: A Tutorial. Stephen Brown and Jonathan Rose. IEEE Design and Test of Computers, 13(2):42--57, Summer 1996. [PS]
On Pin Versus Block Relationship for Partitions of Logic Circuits. B. S. Landman and R. L. Russo. IEEE Transactions on Computers, 20:1469--1479, 1971. (Classic paper showing empirical evidence for Rent's Rule.)

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