CSE590G: Architecture Seminar, Fall 2007

Wednesdays, 12:30-13:30, Room CSE503.

A discussion leader does not need to prepare a full presentation, just 2-3 slides with the summary and discussion points. Focus on what we should all think about!

DateDiscussion LeaderPaper
Sep 26 Luis Organizational Meeting, paper assignments
Oct 03 Lucas New Cache Designs for Thwarting Software Cache-based Side Channel Attacks,
by Zhenghong Wang and Ruby B. Lee, ISCA'07.
Oct 10 Benjamin Revisiting the Sequential Programming Model for Multi-Core,
by Matthew Bridges, Neil Vachharajani, Yun Zhang, Thomas Jablin and David August, MICRO'07.
Oct 17 Jacob Power Provisioning for a Warehouse-sized Computer,
by Xiaobo Fan, Wolf-Dietrich Weber and Luiz Andre Barroso, ISCA'07.
Oct 24 Stephen Software-Based On Line Detection of Hardware Defects: Mechanisms, Architectural Support, and Evaluation,
by Kypros Constantinides, Onur Mutlu, Todd Austin, and Valeria Bertacco, MICRO'07.
Oct 31 --- Affiliates day. No meeting.
Nov 07 Stefan Berg (NVIDIA) Talk on NVIDIA G80.
Nov 14 Brian E. Carbon: Architectural Support for Fine-Grained Parallelism on Chip Multiprocessors,
by Sanjeev Kumar, Christopher J. Hughes, Anthony Nguyen, ISCA'07.
Nov 21 Andrew P. Hardware Atomicity for Reliable Software Speculation,
by Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan, and Craig Zilles, ISCA'07.
Nov 28 Martha/Brian B. Virtual Hierarchies to Support Server Consolidation,
by Michael R. Marty and Mark D. Hill, ISCA'07.
Dec 05 Brandon AVIO: Detecting Atomicity Violations via Access-Interleaving Invariants,
by Shan Lu, Joe Tucek, Feng Qin, and Yuanyuan Zhou, ASPLOS'06.
MUVI: Automatically Inferring Multi-Variable Access Correlations and Detecting Related Semantic and Concurrency Bugs,
by Shan Lu, Soyeon Park, Chongfeng Hu, Xiao Ma, Weihang Jiang, Zhenmin Li, Raluca A. Popa and Yuanyuan Zhou, SOSP'07.

Here is an initial list of papers to choose from. Email luisceze if you have more suggestions. We can also use the mailing list.

  1. Global Multi-Threaded Instruction Scheduling,
    by Guilherme Ottoni and David I. August, MICRO'07.

  2. CheckFence: Checking Consistency of Concurrent Data Types on Relaxed Memory Models,
    by S. Burckhardt, R. Alur, M.M.K. Martin, PLDI'07.

  3. Automatically Classifying Benign and Harmful Data Races Using Replay Analysis,
    by Satish Narayanasamy, Zhenghao Wang, Jordan Tigani, Andrew Edwards and Brad Calder, PLDI'07

  4. Raksha: A Flexible Information Flow Architecture for Software Security,
    by Michael Dalton, Hari Kannan and Christos Kozyrakis, ISCA'07.

  5. Implementing Signatures for Transactional Memory,
    by Daniel Sanchez, Luke Yen, Mark D. Hill and Karthikeyan Sankaralingam, MICRO'07.

  6. Effective Optimistic-Checker Tandem Core Design Through Architectural Pruning,
    Francisco J. Mesa-Martinez and Jose Renau, MICRO'07

  7. Process Variation Tolerant 3T1D-Based Cache Architectures,
    by Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei and David M. Brooks, MICRO'07.