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 CSE 548: Computer Architecture - Winter 2008
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CSE 548 Schedule (Winter 2008)

This course schedule will be updated, so check it often.
The dates for the readings indicate the day that the reading should have been read.

 
Class
Topic
Reading
SlidesCSE only1
Project Milestones
Week 1:
1/7 & 1/9
Introduction, Project Ideas Chap 1 l0-intro.pdf Start thinking about your project topic.
Metrics, ISA, Pipelining Review 1.8, A.1-A.4, Ch. 2.1
(optional) Characterizing computer performance with a single number, J. Smith, 1988.
(optional) Compilers and Computer Architecture, W. Wulf, 1981.
l1-metrics-isa-pipelining.pdf
Week 2:
1/14 & 1/16
Instruction-Level Parallelism I 2.1-2.6 l2-ilp-1.pdf Project Meetings Signup Here
Note: Only one person can signup per slot, but teams of 2 are still allowed.
Instruction-Level Parallelism II 2.7-2.12, 3.1-3.4
The Microarchitecture of Superscalar processors, Smith, Sohi.
The MIPS R10000 Superscalar Processor, Yeager.
l3-ilp-2.pdf
Week 3:
1/21 & 1/23
MLK Day, No Class
Memory Dependences, Memory Hierarchies C.1-C.3 l4-memhiar.pdf  
Week 4:
1/28 & 1/30
Memory Hierarchies II 5.1-5.3
Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers, Jouppi, 1990.
l5-memhiar2.pdf  
Virtual Memory C.4-C.8, 5.4   l6-virtualmemory.pdf
Week 5:
2/4 & 2/6
Vector Processors B
The Cray-1 Computer System,1978, Russel.
l7-vector.pdf HW1 Due in class (2/4)  
Multithreading Tera paper
SMT paper
l8-multithreading.pdf
Week 6:
2/11 & 2/13
Multiprocessors I - Intro and Coherence 4.1-4.4
A Survey of Cache Coherence Schemes for Multiprocessors, P. Stenstrom
l9-mp1.pdf HW2 Assigned (2/11) 
Guest Lecture on Cray's XMT Robert Henry (Cray)  
Week 7:
2/18 & 2/20
President's Day,  No Class
HW2 Due in Class (2/20)  
Guest Lecture on Power
Bobbie Manne (AMD AATL)
Power: A First-Class Architectural Design Constraint, Mudge.  
Week 8:
2/25 & 2/27
Multiprocessors II - Memory Consistency Shared Memory Consistency Models: A Tutorial, Adve and Gharachorloo.
Multiprocessors Should Support Simple Memory Consistency Models, Hill.
Two Techniques to Enhance the Performance of Memory Consistency Models, Gharachorloo et al.
l10-mp2.pdf  
Multiprocessors III - Consistency/Synchronization An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors, Pai et. al. (optional)
Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors, Crummey and Scott (optional).
Transactional Memory Coherence and Consistency, Hammond et al.
l11-mp3.pdf
Week 9:
3/3 & 3/5
ASPLOS - no Class     HW3 Assigned (3/5)
ASPLOS - no Class    
Week 10:
3/10 & 3/12
Virtual Machines/Binary Instrumentation, Translation The Transmeta Code Morphing Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges, James C. Dehnert et al.
FX!32 A Profile-Directed Binary Translator, Anton Chernoff et al.
Pin: Building Customized Program Analysis Tools with Dynamic Instrumentation, Chi-Keung Luk et al.
Formal requirements for virtualizable third generation architectures, Gerald J. Popek et al.
l12-vm.pdf
Wrap-up    
Finals Week:
3/17 Project Presentations (9:30 - Noon)    
3/18 HW3 Due to Steve (mailbox or email) by 5pm    
3/20 Project Report Due by 7pm    


Slides for this class are derived from materials by:

  • Susan Eggers (UW)
  • Jose Renau (UCSC)
  • Arvind (MIT)
  • Krste Asanovic (MIT/UCB)
  • Joel Emer (Intel / MIT)
  • James Hoe (MIT / CMU)
  • David Patterson (UCB)
  • John Kubiatowicz (UCB)


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