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Class
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Topic
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Reading
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Slides 1
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Project Milestones
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Week 1:
1/7 & 1/9
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Introduction, Project Ideas
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Chap 1 |
l0-intro.pdf
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Start thinking about your project topic.
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Metrics, ISA, Pipelining Review
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1.8, A.1-A.4, Ch. 2.1
(optional) Characterizing computer performance with a single number, J. Smith, 1988.
(optional) Compilers and Computer Architecture, W. Wulf, 1981.
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l1-metrics-isa-pipelining.pdf
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Week 2:
1/14 & 1/16
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Instruction-Level Parallelism I
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2.1-2.6 |
l2-ilp-1.pdf |
Project Meetings Signup Here
Note: Only one person can signup per slot, but teams of 2 are still allowed.
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Instruction-Level Parallelism II
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2.7-2.12, 3.1-3.4
The Microarchitecture of Superscalar processors, Smith, Sohi.
The MIPS R10000 Superscalar Processor, Yeager.
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l3-ilp-2.pdf
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Week 3:
1/21 & 1/23
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MLK Day, No Class
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Memory Dependences, Memory Hierarchies
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C.1-C.3
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l4-memhiar.pdf
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Week 4:
1/28 & 1/30
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Memory Hierarchies II
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5.1-5.3
Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers, Jouppi, 1990.
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l5-memhiar2.pdf
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Virtual Memory
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C.4-C.8, 5.4
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l6-virtualmemory.pdf
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Week 5:
2/4 & 2/6
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Vector Processors
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B
The Cray-1 Computer System,1978, Russel.
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l7-vector.pdf
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HW1 Due in class (2/4)
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Multithreading
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Tera paper
SMT paper
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l8-multithreading.pdf
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Week 6:
2/11 & 2/13
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Multiprocessors I - Intro and Coherence
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4.1-4.4
A Survey of Cache Coherence Schemes for Multiprocessors, P. Stenstrom
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l9-mp1.pdf |
HW2 Assigned (2/11)
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Guest Lecture on Cray's XMT
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Robert Henry (Cray)
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Week 7:
2/18 & 2/20
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President's Day, No Class
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HW2 Due in Class (2/20)
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Guest Lecture on Power
Bobbie Manne (AMD AATL)
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Power: A First-Class Architectural Design Constraint, Mudge.
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Week 8:
2/25 & 2/27
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Multiprocessors II - Memory Consistency
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Shared Memory Consistency Models: A Tutorial, Adve and Gharachorloo.
Multiprocessors Should Support Simple Memory Consistency Models, Hill.
Two Techniques to Enhance the Performance of Memory Consistency Models, Gharachorloo et al.
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l10-mp2.pdf |
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Multiprocessors III - Consistency/Synchronization
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An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors, Pai et. al. (optional)
Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors, Crummey and Scott (optional).
Transactional Memory Coherence and Consistency, Hammond et al.
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l11-mp3.pdf
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Week 9:
3/3 & 3/5
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ASPLOS - no Class
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HW3 Assigned (3/5)
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ASPLOS - no Class
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Week 10:
3/10 & 3/12
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Virtual Machines/Binary Instrumentation, Translation
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The Transmeta Code Morphing Software:
Using Speculation, Recovery, and Adaptive Retranslation
to Address Real-Life Challenges, James C. Dehnert et al.
FX!32 A Profile-Directed Binary Translator, Anton Chernoff et al.
Pin: Building Customized Program Analysis Tools with Dynamic Instrumentation, Chi-Keung Luk et al.
Formal requirements for virtualizable third generation architectures, Gerald J. Popek et al. |
l12-vm.pdf
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Wrap-up
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Finals Week:
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3/17 Project Presentations (9:30 - Noon)
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3/18 HW3 Due to Steve (mailbox or email) by 5pm |
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3/20 Project Report Due by 7pm |
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